The invention relates to a method of manufacturing a semiconductor device comprising MOS-transistors having gate oxides of different thicknesses, including MOS-transistors of a first type having a gate oxide of a first thickness and MOS-transistors of a second type having a gate oxide of a second, greater thickness, in which method active regions and field oxide regions isolating said active regions from each other are formed in a silicon body, adjacently to a surface thereof, after which a layer of gate oxide of said first thickness is formed on said active regions, on which a layer of an electrode material is deposited, in which the gate electrodes for the MOS-transistors of said second type are formed, after which the thickness of the gate oxide under said gate-electrodes is increased to the second, larger thickness by means of a thermal oxidation treatment.
Such a method is used in practice for manufacturing semiconductor devices, which comprise an integrated circuit including circuits for different functions. In order to realize these functions, MOS-transistors having gate oxides of different thicknesses are required. In circuits which are made in xe2x80x9c0.18 xcexcm processesxe2x80x9d (processes for manufacturing semiconductor devices in which photolithographic techniques are used by means of which smallest dimensions of 0.18 xcexcm can be obtained), MOS-transistors which are used in logic circuits have a gate oxide about 3 nm in thickness, for example, MOS-transistors which are used for handling higher voltages have a gate oxide having a thickness of about 7.5 nm, and memory transistors have a gate oxide having a thickness of about 10 nm under a floating gate.
From EP 0 966 036 A2 a method of the kind referred to in the introduction is known, in which the gate electrodes for the MOS-transistors of the first type are formed in the layer of electrode material simultaneously with those for the MOS-transistors of the second type. The layer of electrode material, in this case a layer which is composed of a layer of polycrystalline silicon, on which a layer of, for example, titanium silicide and a top layer of silicon nitride are deposited, is formed on a layer of gate oxide 6 nm in thickness. After the formation of the gate electrodes for the two types of MOS-transistors, the thermal oxidation treatment is carried out. In order to obtain gate oxides of different thicknesses for the two aforesaid types of MOS-transistors, relatively large active regions are used for the MOS-transistors of the first type and relatively small active regions are used for the MOS-transistors of the second type. The gate electrodes for the MOS-transistors having the thin gate oxide are formed on relatively large active regions; the gate electrodes for the MOS-transistors having the thick gate oxide are formed on relatively small active regions. It becomes apparent in that case that when the thickness of the gate oxide under the gate electrodes on the relatively small active regions increases during the oxidation treatment from, for example, the original 6 nm to a thickness of 10 nm, the thickness of the gate oxide under the gate electrodes on the large active regions hardly changes at all, only increasing to a thickness of 7 nm.
A drawback of this known method is the fact that the thickness of the gate oxide formed under the gate electrodes depends on the dimensions of the active regions on which said gate electrodes have been formed. A particular drawback is the fact that the MOS-transistors having the thinnest gate oxide require the largest active regions, and that MOS-transistors having the thickest gate oxide require the smallest active regions. Circuits that operate on a low supply voltage of, for example, 1.8 V, such as microprocessors, comprise many relatively small MOS-transistors having a relatively thin gate oxide; circuits that operate on a higher voltage of, for example, 5 V, such as I-O gates, comprise few relatively large MOS-transistors having a relatively thick gate oxide. Consequently, such circuits can only be combined on a silicon body by sacrificing a relatively large amount of space when using the known method.
The object of the invention is to provide a method by means of which it is possible to manufacture a semiconductor device comprising MOS-transistors having gate oxides of different thicknesses, in which the realization of gate oxides of different thicknesses takes place independently of the dimensions of the active regions, and by means of which it is possible to produce small MOS-transistors having a thin gate oxide and large MOS-transistors having a thick gate oxide.
In order to achieve that object, the method according to the invention is characterized in that the layer of electrode material on the active regions of the MOS-transistors of the first type is not disturbed during the formation of the gate electrodes for the MOS-transistors of the second type, and that the gate electrodes for the MOS-transistors of the first type are only formed therein after the oxidation treatment in which the thickness of the gate oxide of the MOS-transistors of the second type is increased to the second, greater thickness. The original layer of gate oxide, which may have a thickness of, for example, 3 nm is covered by the layer of electrode material at the location of the MOS-transistors of the type having the thin gate oxide during the oxidation treatment, during which treatment its thickness will not change. The layer under the gate electrodes of the MOS-transistors of the type having the thick gate oxide becomes thicker. The thickness of the layer can be increased to a desired thickness of, for example, 7.5 nm independently of the dimension of the active region of said transistors. If the gate electrodes of the transistors of the type having the thin gate oxide are formed after the oxidation treatment, the said MOS-transistors will have a gate oxide having a thickness of 3 nm.
A semiconductor device comprising MOS-transistors having gate oxides of three different thicknesses can be realized in a simple manner if gate electrodes for a third type of MOS-transistor having a gate oxide of a third thickness greater than the aforesaid second thickness are formed in the layer of electrode material before the gate electrodes of the transistors of the second type are formed, after which the desired third thickness of the gate oxide under said gate electrodes is realized by means of a thermal oxidation treatment which is carried out before the gate electrodes of the transistors of the second type are formed in combination with the thermal oxidation treatment that is carried out subsequently. During the first oxidation treatment, the thickness of the gate oxide under the gate electrodes of the MOS-transistors of the third type, i.e. the type having the thickest gate oxide, is increased from a thickness of 3 xcexcm to a thickness of 5.5 nm, for example. During the second oxidation treatment, in which the thickness of the gate oxide under the gate electrodes of the MOS-transistors of the second type, i.e. the type with the medium thickness gate oxide, is increased to a thickness of 7.5 nm, also the thickness of the gate oxide under the gate electrodes of the transistors having the thickest gate oxide is increased from the already larger thickness of 5.5 nm to a thickness of 10 nm. The MOS-transistors of the first type, the type having the thinnest gate oxide, have the original gate oxide having a thickness of 3 nm. Thus, MOS-transistors having a gate oxide having a thickness of 3 nm, 7.5 nm and 10 nm have been formed in a simple manner.
A semiconductor device comprising MOS transistors having gate oxides of even more different thicknesses can be realized in a simple manner if gate electrodes for other types of MOS-transistors having a gate oxide of a thickness larger than the third thickness are formed in the layer of electrode material before the gate electrodes of the transistors of the third type are formed, in which the gate electrodes for the transistors having the thickest gate oxide are formed first and the gate electrodes for the transistors having thinner gate oxides are formed next in separate process steps, in which oxidation treatments are carried out between said process steps and in which the desired thickness of the gate oxides for all MOS-transistors is realized cumulatively and in steps. Thus, it is possible to form MOS-transistors having gate oxides of many different thicknesses on the silicon body.
During the oxidation treatments, the gate oxide under the gate electrodes increases in thickness from the edges. In the case of relatively wide gate electrodes, the gate oxide will be thicker under the edges of said gate electrodes than in the center; oxidants such as oxygen and water have difficulty reaching the center of the gate electrodes. In the case of relatively narrow gate electrodes, the gate oxide in the center of the gate electrodes grows at the same rate as at the edges, because in this case the oxidants are capable of reaching the center from both sides of the gate electrode. In that case, a gate oxide of practically homogeneous thickness is obtained under the gate electrodes. Preferably, the gate electrodes of the MOS-transistors have a width of less than 350 nm, because it is possible to realize gate oxides of the said homogeneous thickness in that case.
The oxidation treatments can be carried out in many ways, using different temperatures and different oxidizing atmospheres. Preferably, the thermal oxidation treatment is a treatment in which the silicon body is heated to a temperature between 750xc2x0 C. and 850xc2x0 C. in a water vapor-containing atmosphere. The formation of the gate oxides can be readily controlled in that case. In the aforesaid example, in which gate oxides of 3 nm, 7.5 nm and 10 nm were formed, two oxidation treatments were carried out. In the first treatment, the thickness of the original gate oxide was increased from 3 nm to a greater thickness of 5.5 nm at the location of the MOS-transistors of the third type, and in the second oxidation treatment this thickness was increased to 10 nm, with the thickness of the gate oxide under the gate electrodes of the MOS-transistors of the second type being increased to 7.5 nm. Both oxidation treatments last about 30 minutes if the preferred treatment is used.